发明名称 |
SEMICONDUCTOR MEMORY |
摘要 |
<p>Among memory blocks arranged along one direction, memory blocks at the both ends are included in a partial area. Since a part of a control circuit for operating the memory blocks at the both ends is not shared by other memory blocks, a switch circuit for connecting the control circuit to the memory blocks can always be set to ON state. Since ON/OFF control of the switch circuit is not required, power consumption of the memory blocks at the both ends incident to access is low as compared to other memory blocks. Consequently, power consumption (stand-by current) can be reduced during partial refresh mode by including the memory blocks at the both ends in the partial area.</p> |
申请公布号 |
WO2005088642(A1) |
申请公布日期 |
2005.09.22 |
申请号 |
WO2004JP03206 |
申请日期 |
2004.03.11 |
申请人 |
FUJITSU LIMITED;KAWABATA, KUNINORI;OTSUKA, SHUZO |
发明人 |
KAWABATA, KUNINORI;OTSUKA, SHUZO |
分类号 |
G11C8/18;G11C11/406;(IPC1-7):G11C11/406 |
主分类号 |
G11C8/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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