发明名称 DIGITAL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a high-speed multiplication computing digital circuit for complying with a requirement for high-speed data processing, which is necessary in development of a portable terminal, for computing processing by an RISC CPU mounted in the portable terminal. <P>SOLUTION: A circuit shown in the figure is constructed of a barrel shifter outputting an input signal A[n-1:0], SH [log<SB>2</SB>n-1:0], DAT [n-1:0], and data B [n-1:0] in which the signal DAT is shifted by the signal SH bits, a group G/P/SUM calculation step dividing the digits of the A and B into groups for every m bits and calculating an addition result SUM0, which is given when G, P, a carry input is H, and an addition result SUM1, which is given when the carry input is L, a carry calculation circuit calculating a carry for each group, and a SUM selection step selecting the SUM0 or SUM1 calculated for each group according to the respective carries outputted by the carry calculation circuit. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005259083(A) 申请公布日期 2005.09.22
申请号 JP20040073589 申请日期 2004.03.15
申请人 NEC ELECTRONICS CORP 发明人 SASAKI TSUNEKI;MINAMITANI JUNICHIRO
分类号 G06F7/53;G06F7/508;G06F7/52;G06F7/523 主分类号 G06F7/53
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