发明名称 |
Non-volatile semiconductor memory device and controlling method of the same |
摘要 |
This invention largely reduces a data writing time of a non-volatile semiconductor memory device. A memory array is split into a first memory cell array to be programmed with normal data in its memory cells and a second memory cell array to be programmed with inverted data of the normal data in its memory cells. A column decoder selects a bit line connected with the memory cell written with the normal data and a bit line connected with the memory cell written with the inverted data simultaneously. A differential amplifier amplifies a difference between signals outputted to the pair of these bit lines and outputs it to an I/O line.
|
申请公布号 |
US6947325(B2) |
申请公布日期 |
2005.09.20 |
申请号 |
US20040850441 |
申请日期 |
2004.05.21 |
申请人 |
SANYO ELECTRIC CO., LTD. |
发明人 |
KANEDA YOSHINOBU |
分类号 |
G11C16/06;G11C16/02;G11C16/04;G11C16/24;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/04;G11C8/00 |
主分类号 |
G11C16/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|