发明名称 Input power stabilizing circuit
摘要 An input power stabilizing circuit, adapted to be disposed between a DC power source and a load to which DC power from the source is to be supplied. Voltage on a capacitor in the input power stabilizing circuit is prevented as much as possible from causing reverse current to flow when the DC power source develops a short circuit momentarily. A current detecting unit detects reverse current from the capacitor in an input power supply line, and a current interrupting unit interrupts a current line connecting the load with the DC power source. When reverse current flow is detected, the current line is interrupted by the current detecting unit and the current interrupting unit. The reverse current from the capacitor is held to a minimum value in the input power stabilizing circuit.
申请公布号 US6946752(B2) 申请公布日期 2005.09.20
申请号 US20020119735 申请日期 2002.04.11
申请人 NEC COMMUNICATION SYSTEMS, LTD. 发明人 TAHARA HIROMITSU
分类号 H02J7/00;G05F1/10;H02H3/087;H02H3/18;H02H7/16;(IPC1-7):H01H000/00 主分类号 H02J7/00
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