| 摘要 |
PROBLEM TO BE SOLVED: To realize high-speed operation, low power consumption and stable operation by diminishing the parasitic capacity and prevention of the generation of a floating node, when reducing the finishing size unevenness of a gate electrode, utilizing a dummy gate. SOLUTION: The finishing size unevenness is reduced by a step using the dummy gate 108, and a gate electrode 102 is formed. Then, after a first interlayer insulating film 105 is formed, the part of the first interlayer insulating film 105 is removed, and further, the dummy gate 108 is removed. A second interlayer insulating film 106 of lower dielectric constant than the first interlayer insulating film 105 is formed on a region, in which the dummy gate 108 and the part of the first interlayer insulating film 105 are removed. COPYRIGHT: (C)2005,JPO&NCIPI
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