| 发明名称 |
Tamper resistant secure architecture |
| 摘要 |
A system comprising at least one host processor, at least one security processor and a first memory that is exclusively accessible only by the security processor.
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| 申请公布号 |
US2005204155(A1) |
申请公布日期 |
2005.09.15 |
| 申请号 |
US20040795385 |
申请日期 |
2004.03.09 |
| 申请人 |
NEC LABORATORIES AMERICA, INC |
发明人 |
RAVI SRIVATHS;RAGHUNATHAN ANAND;CHAKRADHAR SRIMAT T. |
| 分类号 |
H04L9/00;(IPC1-7):H04L9/00 |
主分类号 |
H04L9/00 |
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