发明名称 Bonding pad arrangement method for semiconductor devices
摘要 A variety of pad arrangements are provided for semiconductor devices for reducing the likelihood of bonding failures, particularly those due to shorts, and/or for reducing the difference in length between bonding wires to decrease signal skew during operation of the semiconductor device and improve signal integrity.
申请公布号 US2005194664(A1) 申请公布日期 2005.09.08
申请号 US20050107897 申请日期 2005.04.18
申请人 LEE HO-CHEOL;KIM JAE-HOON;RYU JUNG-SU 发明人 LEE HO-CHEOL;KIM JAE-HOON;RYU JUNG-SU
分类号 H01L21/60;H01L23/50;(IPC1-7):H01L23/495 主分类号 H01L21/60
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