发明名称 POWER SUPPLY CIRCUIT AND DISPLAY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a display device in which display picture quality is improved and power consumption is reduced. SOLUTION: The display device is equipped with an oscillating circuit 1 to generate a reference clock CLK (osc), a counter circuit 2 for display to generate a frame sync signal CLK (frm). a line select reference clock signal CLK (drv), and a voltage multiplying motion reference clock obtained by multiplying the line select reference clock signal CLK (drv) from the reference clock, a divided frequency circuit 4 to input the frame sync signal CLK (frm) as a reset signal and to output a voltage multiplying motion clock CLK (dcdc) by frequency dividing the voltage multiplying motion reference clock, a voltage multiplying circuit 5 to fulfill a charge period and a discharge period in accordance with the voltage multiplying motion clock CLK (dcdc), and a driver circuit 3 to receive a multiplying voltage from the voltage multiplying circuit and to drive a scanning line in accordance with the line select reference clock signal CLK (drv). COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005241836(A) 申请公布日期 2005.09.08
申请号 JP20040049888 申请日期 2004.02.25
申请人 NEC ELECTRONICS CORP 发明人 TABATA TAKASHI
分类号 G02F1/133;G09G3/00;G09G3/20;G09G3/36;G09G5/00;H02M3/07;(IPC1-7):G02F1/133 主分类号 G02F1/133
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