发明名称 Memory co-processor for a multi-tasking system
摘要 A co-processor (also called "memory co-processor") provides an interface to a memory, by executing instructions on data held in the memory. The co-processor uses a specified address to fetch data from memory, performs a specified instruction (such as incrementing a counter or policing) on the data to obtain modified data, and writes the modified data back to memory at the same address. Depending on the embodiment, the memory co-processor may include a first buffer for holding instructions that may be received back to back, in successive clock cycles. Instead of or in addition to the first buffer, the memory co-processor may include a second buffer for holding data to be written to memory back to back, in successive clock cycles. In some embodiments, the memory co-processor also receives (and maintains in local storage) the identity of a task that generates the specified instruction, so that the same cask may be awakened after the instruction has been executed.
申请公布号 US6938132(B1) 申请公布日期 2005.08.30
申请号 US20020117779 申请日期 2002.04.04
申请人 APPLIED MICRO CIRCUITS CORPORATION 发明人 JOFFE ALEXANDER;KHAMISY ASAD
分类号 G06F9/38;G06F12/00;(IPC1-7):G06F12/00 主分类号 G06F9/38
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