发明名称 SEMICONDUCTOR MEMORY
摘要 <p>A semiconductor memory having a clock-synchronized burst mode read function and including a memory array constituted by a plurality of memory elements; a synchro-read control circuit that outputs, in synchronism with a clock, the upper order address of an address as a memory access address and also outputs, in synchronism with the clock, the lower order address as a burst address; a sense amplifier that outputs the output data of a memory element selected by the memory address; a decoder that decodes the burst address; an address latch that latches the burst address in synchronism with the clock; a page selector that holds the output data and selects the held output data in accordance with the burst address of the address latch; and an output latch that latches the output data in synchronism with the clock.</p>
申请公布号 WO2005078731(A1) 申请公布日期 2005.08.25
申请号 WO2005JP01893 申请日期 2005.02.09
申请人 SHARP KABUSHIKI KAISHA;TOPPAN PRINTING CO., LTD.;MAEDA, KENGO;TANIGAWA, AKIRA;NISHIYAMA, MASUJI;OHORI, SHOICHI;HIRANO, MAKOTO;TAKASHIMA, HIROSHI;MATOBA, SHINJI;ASANO, MASAMICHI 发明人 MAEDA, KENGO;TANIGAWA, AKIRA;NISHIYAMA, MASUJI;OHORI, SHOICHI;HIRANO, MAKOTO;TAKASHIMA, HIROSHI;MATOBA, SHINJI;ASANO, MASAMICHI
分类号 G11C11/407;G11C16/02;G11C7/10;G11C16/06;(IPC1-7):G11C11/401 主分类号 G11C11/407
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