发明名称 |
Mask layer and interconnect structure for dual damascene semiconductor manufacturing |
摘要 |
A novel mask layer is used in the dual damascene construction of an interconnect structure of an integrated circuit device. The interconnect structure has a low-k dielectric material. The mask layer has a passivation film deposited on the low-k dielectric material, a barrier film is deposited over the passivation film and a metallic film is deposited over the barrier film. The metallic film increases the overall etch selectivity of the mask layer to assure a faithful transfer of via and trench features to the low-k dielectric material during the etching steps of the dual damascene process. |
申请公布号 |
GB2380316(B) |
申请公布日期 |
2005.08.24 |
申请号 |
GB20020004746 |
申请日期 |
2002.02.28 |
申请人 |
* AGERE SYSTEMS INC |
发明人 |
ISAIAH O * OLADEJI;SCOTT * JESSEN;JOSEPH ASHLEY * TAYLOR |
分类号 |
H01L21/3065;H01L21/311;H01L21/56;H01L21/768;H01L23/495;H01L23/522;H01L23/532;(IPC1-7):H01L21/311 |
主分类号 |
H01L21/3065 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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