发明名称 |
Circuitry for data storage, especially dynamic random access memory (DRAM) with flexibly arranged circuit chips for memory cell units and data transmission units, without faults in units causing total breakdown of entire circuitry |
摘要 |
<p>Circuitry comprises memory cell unit (101), e.g. DRAM, with memory cell field for storage of electric charges, data transmission unit (102) for data transmission between memory cell unit and external circuit units. Connector units (104a-n) provide electric link for external circuit units to data transmission unit. Memory cell unit and data transmission unit are arranged on separate chips, with their electric connection escured by coupling unit (103).</p> |
申请公布号 |
DE102004004026(A1) |
申请公布日期 |
2005.08.18 |
申请号 |
DE20041004026 |
申请日期 |
2004.01.27 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
THALMANN, ERWIN;MOSER, MANFRED |
分类号 |
G11C5/04;G11C7/10;(IPC1-7):G11C7/10 |
主分类号 |
G11C5/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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