| 摘要 |
A method is provided to simulate the influence of production-caused variations of interconnect properties in modern semiconductor-technology layouts. Fluctuations of the physical interconnect properties are extracted from a given layout where the geometric layout data and the corresponding technology characteristics serve as input parameters. Statistical distribution of characteristic interconnect properties are the resulting output. If the fluctuations of the interconnect properties or the resulting fluctuations in the system performance meet the specifications, the layout is accepted, otherwise it has to be rejected.
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