发明名称 Bus arrangement and method thereof
摘要 A bus arrangement is provided including a master device and a slave device. A master converts a read command into a write command and sends the write command through a bus network within the bus arrangement and a slave device converts the write command back to the read command and sends a response. The response is sent on a bus not included within the bus network, thereby reducing a response delay time between the transmission of the read command and the response to the read command.
申请公布号 US2005174877(A1) 申请公布日期 2005.08.11
申请号 US20050037076 申请日期 2005.01.19
申请人 CHO SOON-JAE;JANG WOO-YOUNG;RHEE CHAE-EUN 发明人 CHO SOON-JAE;JANG WOO-YOUNG;RHEE CHAE-EUN
分类号 G06F13/364;G06F13/16;G06F13/38;G06F13/40;G06F13/42;G11C8/02;H04L12/403;(IPC1-7):G11C8/02 主分类号 G06F13/364
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