发明名称 Multiple voltage level detection circuit
摘要 A circuit configurable for indicating a voltage level of an input signal applied to the circuit includes at least one transistor having a first terminal connected to a first voltage supply, a second terminal configured for receiving the input signal, and a third terminal operatively coupled to an output of the circuit. The circuit further includes a passive load connected between the third terminal of the transistor and a second voltage supply. The circuit is configured to generate an output signal at the output of the circuit. The output signal being at a first value indicates that the input signal is substantially at a first voltage level, and the output signal being at a second value indicates that the input signal is substantially at a second voltage level.
申请公布号 US2005174125(A1) 申请公布日期 2005.08.11
申请号 US20040776778 申请日期 2004.02.11
申请人 BHATTACHARYA DIPANKAR;KRIZ JOHN C.;SIMKO JOSEPH E. 发明人 BHATTACHARYA DIPANKAR;KRIZ JOHN C.;SIMKO JOSEPH E.
分类号 G01R19/165;G01R31/08;(IPC1-7):G01R31/08 主分类号 G01R19/165
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