发明名称 METHOD OF MANUFACTURING INTEGRATED CIRCUIT AND INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an integrated circuit capable of coping with moisture erosion, interlayer delamination, and the outward diffusion of copper. SOLUTION: A method 1300 of manufacturing an integrated circuit 100, 900 provides a substrate 102 having a semiconductor element 300, and includes a step of forming an intermetal dielectric layer 112 over the substrate 102 and the semiconductor element 300. A metal wire 114 is formed above the semiconductor element 300 and in contact therewith, and a passivation layer 118, 902 is formed over the intermetal dielectric layer 112. A bond pad 304 is formed connected to the metal wire 114. A protective recessed part 200, 1000 formed with a sidewall passivation layer is formed through the passivation layer 118, 902 and the intermetal dielectric layer 112, and located between the metal wire 114 and the outside edge of the integrated circuit 100, 900. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005217411(A) 申请公布日期 2005.08.11
申请号 JP20050020124 申请日期 2005.01.27
申请人 CHARTERED SEMICONDUCTOR MFG LTD 发明人 ZHANG FAN;CHOK KHO LIEP;LEE TAE JONG;BU XIAOMEI;LUO MENG;SIN CHIAN YUH;FOONG YEE MEI;GOH LUONA;LIANG CHOO HSIA;HUEY MING CHONG
分类号 H01L23/52;H01L21/3205;H01L21/822;H01L23/04;H01L23/31;H01L23/58;H01L27/04;(IPC1-7):H01L21/320 主分类号 H01L23/52
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