Integrated circuit comprising a secure test mode by resetting of said test mode

摘要

The circuit is adapted to function in a normal operation mode or in a test mode during which a test access port (TAP) controller configures configurable cells (C1-CN) either in functional state or in a chained state in which the cells are functionally connected in chain to form a shift register. A validation circuit produces initialization signals to control initialization of the cells and produces a signal to change the circuit mode.