发明名称 |
Method of forming an interconnection line structure |
摘要 |
A method for forming an interconnection line and an interconnection line structure are disclosed. The method includes forming an interlayer insulating layer (104) on a semiconductor substrate (100), wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier layer (106) of e.g. SiCN is formed on the interlayer insulating layer. An oxide capping layer (108) of e.g. SiO2 is formed on the oxidation barrier layer. A via hole (112) or dual damascene pattern is formed in the oxide capping layer, the oxidation barrier, and the interlayer insulating layer. A conductive layer pattern (116') is formed within the via hole or dual damascene pattern. <IMAGE>
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申请公布号 |
EP1560264(A1) |
申请公布日期 |
2005.08.03 |
申请号 |
EP20050000966 |
申请日期 |
2005.01.19 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, KYOUNG-WOO;SHIN, HONG-JAE;KIM, JAE-HAK;WEE, YOUNG-JIN;LEE, SEUNG-JIN;PARK, KI-KWAN |
分类号 |
H01L21/28;H01L21/768;H01L23/522;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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