发明名称 Programmable phase-locked loop circuitry for programmable logic device
摘要 A phase-locked loop ("PLL") for use in a programmable logic device ("PLD") is constructed with modular components, which may be digital, and which may be programmable or adjustable, in place of the conventional analog charge pump and loop filter. Connections are provided between those components and the remainder of the PLD so that if the PLL is not being used in a particular user design of the PLD, the PLL modular components may be used by other portions of the PLD. Similarly, those connections allow other portions of the PLD to be used in place of one or more of the modular components where more complex or special filtering than can be provided by the modular components is required.
申请公布号 US6924678(B2) 申请公布日期 2005.08.02
申请号 US20030691152 申请日期 2003.10.21
申请人 ALTERA CORPORATION 发明人 STARR GREGORY
分类号 G06F7/00;G06F17/50;H01L21/82;H01L21/822;H01L27/04;H03K19/177;H03L7/08;H03L7/089;H03L7/093;(IPC1-7):H03L7/06 主分类号 G06F7/00
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