| 摘要 |
An OFDM demodulator includes an FFT circuit, a phase correction circuit, and a timing synchronization circuit. The timing synchronization circuit includes a symbol-boundary calculation circuit to estimate a symbol-boundary position Nx by filtering the correlation peak of a guard interval, symbol-boundary correction circuit to calculate a clock-phase error based on the symbol-boundary position Nx, and a start-flag generation circuit to generate a start flag for the FFT calculation. The symbol-boundary correction circuit subtracts only a value whose precision is smaller than the cycle of a reference clock from the symbol-boundary position Nx, and generates a phase correction signal for each sub-carrier based on the value. The phase correction circuit performs a complex multiplication of the FFF-calculated signal by the phase correction signal to correct the clock-phase error.
|
