| 摘要 |
<p>The process involves exchanging information with a functional block via upper level protocol and generating in response a critical rank vector having components. The critical row vectors generated by agents (103, 104) are concurrently received. A maximum or minimum extraction mechanism is applied on one component of the vector to identify a block that accesses a shared memory. An independent claim is also included for a semiconductor product architecture integrated on a semiconductor product or system on chip having a set of functional blocks.</p> |
