<p>A cache memory has a valid flag indicating whether a cache entry holding unit data on cache is valid or not correspondingly to the cache entry and a dirty flag indicating whether write for the cache entry is done or not. The cache memory comprises a flag altering section for setting a valid flag by creating the address of the cache entry as a tag without loading data from a memory according to the instruction from the processor or resetting the dirty flag while holding rewritten data not written back for the cache entry.</p>
申请公布号
WO2005066796(A1)
申请公布日期
2005.07.21
申请号
WO2004JP19102
申请日期
2004.12.21
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;NAKANISHI, RYUTA;OKABAYASHI, HAZUKI;TANAKA, TETSUYA;MIYASAKA, SHUJI