| 摘要 |
The signal level conversion circuit has a first terminal for a signal of a low power voltage; a second terminal for a signal of a high power voltage higher than the low power voltage; a level shifter which is disposed in a signal path from the first terminal to the second terminal to convert the low power voltage signal into the high power voltage signal; and a first input buffer including a first inverter of P1 and N1 whose gates are connected to the first terminal, and a one-way device between a voltage supply of the low power voltage and a source of P1. The level shifter includes second and third inverters which are interposed between an output of the first input buffer and the second terminal and which use the high power voltage and which are connected in series, an output of the first input buffer is supplied to an input of the second inverter and an output of the third inverter, and a circuit threshold value of the second inverter using the high power voltage is set to be lower than a voltage obtained by subtracting a voltage drop consumed by the one-way device from the low power voltage. A first logic circuit for calculating the signal of the low or high power voltage is disposed in a certain portion of the signal path, and a circuit threshold value of the first logic circuit is set to be lower than a voltage obtained by subtracting a voltage drop consumed by the one-way device from the low power voltage.
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