| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor readout circuit, which can effectively perform a high-speed readout operation of memory cell data, even when the capacitance or the resistance of a bit line is large. <P>SOLUTION: There are provided: a precharge circuit 5 for charging the bit line BL connected to a memory cell at a prescribed precharge voltage, before reading out information stored in the memory cell; a feedback type bias circuit 2 for controlling the voltage of the bit line BL at the prescribed voltage; a sense amplifier 4 for amplifying and detecting the voltage variation of a readout input node N1 connected with the bit line BL via a transfer gate 20 of the feedback type bias circuit 2; and a load circuit 3 for charging the readout input node N1. The load circuit 3 is deactivated for at least a specified period of time immediately before the completion of a precharge period when the precharge circuit 5 is activated, and is activated after the completion of the precharge period of time. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
