发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY CELL AND MANUFACTURING METHOD THEREOF
摘要 <p>A stacked-gate structure includes a tunnel insulation film, a floating gate electrode, an inter-electrode insulation film and a control gate electrode, which are stacked on a semiconductor substrate. The inter-electrode insulation film has a three-layer structure that includes a first oxidant barrier layer, an intermediate insulation layer and a second oxidant barrier layer. Gate side-wall insulation films are formed on both side surfaces of the stacked-gate structure. The thickness of the gate side-wall insulation film increases, at a side portion of the floating gate electrode, from the inter-electrode insulation film side toward the tunnel insulation film side. The width of the floating gate electrode in a channel length direction decreases from the inter-electrode insulation film side toward the tunnel insulation film side.</p>
申请公布号 KR20050072064(A) 申请公布日期 2005.07.08
申请号 KR20050000514 申请日期 2005.01.04
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OZAWA YOSHIO
分类号 H01L21/8247;H01L21/28;H01L21/336;H01L27/115;H01L29/423;H01L29/51;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):H01L29/78 主分类号 H01L21/8247
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