| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an NMOS inverter circuit wherein no unsharp state takes place in a transient output waveform. <P>SOLUTION: A drain of a transistor TR1 is connected to a high level Vcc 1, a source is connected to an output node A, and a gate is connected to an intermediate node B. A drain of a transistor TR 2 is connected to the output node A, a source is connected to a low level Vss, and a gate is connected to an input node C. A drain of a transistor TR 3 is connected to the intermediate node B, a source is connected to the low level Vss, and a gate is connected to the input node C. A drain of a transistor TR 4 is connected to a high level Vcc 2, a source is connected to the intermediate node B, and a gate is connected to the node D. A drain of a transistor TR 5 is connected to a high level Vcc 3 higher than a threshold voltage of the transistor TR 4, a source is connected to the node D, and a gate is connected to the input node C. The capacitor C1 is connected between the nodes B,D. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
