DRAM USING ALIGNED SOI DOUBLE GATE TRANSISTOR AND PROCESS THEREOF,申请号KR20020025914-传众专利搜索

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发明名称	DRAM USING ALIGNED SOI DOUBLE GATE TRANSISTOR AND PROCESS THEREOF
摘要
申请公布号	KR100497672(B1)	申请公布日期	2005.07.01
申请号	KR20020025914	申请日期	2002.05.10
申请人		发明人
分类号	H01L27/108;(IPC1-7):H01L27/108	主分类号	H01L27/108
代理机构		代理人
主权项
地址

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