发明名称 Flop repeater circuit
摘要 A system is provided that includes a clocking circuit to provide two repeater clock signals and a flop repeater circuit to receive the two repeater clock signals and an input data signal. The flop repeater circuit to provide an output data signal based on the two repeater clock signals. The flop repeater circuit including a plurality of transistors and inverters coupled together to function as a flip-flop circuit that passes data without any full transmission gates.
申请公布号 US2005141599(A1) 申请公布日期 2005.06.30
申请号 US20030744085 申请日期 2003.12.24
申请人 HSU STEVEN K.;KRISHNAMURTHY RAM K.;GEROSA GIAN 发明人 HSU STEVEN K.;KRISHNAMURTHY RAM K.;GEROSA GIAN
分类号 H04B3/36;(IPC1-7):H04B3/36 主分类号 H04B3/36
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