发明名称 Method of fabricating dual damascene interconnections of microelectronic device
摘要 A method of fabricating dual damascene interconnections is provided. A dual damascene region is formed in a hybrid dielectric layer (130) having a dielectric constant of 3.3 or less, and a carbon-free inorganic material (160) is used as a via filler during formation of a trench (190). The present invention improves electrical properties of dual damascene interconnections and minimizes defects. <IMAGE>
申请公布号 EP1385201(A3) 申请公布日期 2005.06.29
申请号 EP20030016761 申请日期 2003.07.23
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, KYOUNG-WOO;LEE, SOO-GEUN;PARK, WAN-JAE;KIM, JAE-HAK
分类号 H01L21/3065;H01L21/768;H01L23/522 主分类号 H01L21/3065
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