发明名称 Pulse triggered static flip-flop having scan test
摘要 A testable, pulse-triggered static flip-flop. A pulse generator produces a data enable trigger pulse only when a test enable input is low, and a scan test enable trigger pulse only when a test enable input is high. The data enable trigger pulse controls the data input to the flip-flop, while the scan test enable trigger pulse controls the scan test input to the flip-flop. The flip-flop consists of a selection circuit comprised of two latches, each including an inverter and a transmission gate. One latch receives the data input and the other latch receives the scan test input. The data enable trigger pulse controls the transmission gate receiving the data input, and the scan test trigger pulse controls the transmission gate receiving the scan test input. The flip-flop also includes a keeper circuit consisting of a feedback inverter and a static latch.
申请公布号 US6911845(B2) 申请公布日期 2005.06.28
申请号 US20030249353 申请日期 2003.04.02
申请人 STMICROELECTRONICS, INC. 发明人 HOSSAIN RAZAK;CAVALLI MARCO
分类号 H03K3/037;H03K3/356;(IPC1-7):H03K19/096 主分类号 H03K3/037
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