| 摘要 |
A parity assist circuit that provides multiple XOR calculations using a scatter-gather list is disclosed. The parity assist circuit includes a control circuit that obtains a plurality of source operands in response to a scatter-gather list, and an XOR engine that provides a plurality of XOR products computed from the supplied source operands. Destination and length parameters in the scatter-gather list are used by the XOR engine to store the XOR computation product and to determine the length of the data in the source and destination blocks to be computed. Preferably, the parity assist circuit is part of a RAID controller that includes a processor and a cache memory. The parity assist circuit preferably utilizes the scatter-gather list to gather required source operands from a memory and to scatter multiple XOR products to the memory before sending an interrupt to the processor or receiving additional setup instructions from the processor, thereby providing rapid and efficient parity calculations and improving overall system performance of the RAID storage subsystem.
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