发明名称 |
Duty cycle correcting circuits having a variable gain and methods of operating the same |
摘要 |
Duty cycle correcting circuits having a gain adjusting circuit that selects one of a plurality of gains of the duty cycle correcting circuit based on a frequency of an input signal. An output circuit outputs a duty cycle corrected output signal based on the input signal and the selected one of the plurality of gains. The input signal may be an input clock signal and the output signal may be a corrected clock signal. Methods are also provided.
|
申请公布号 |
US2005134341(A1) |
申请公布日期 |
2005.06.23 |
申请号 |
US20040972847 |
申请日期 |
2004.10.25 |
申请人 |
LEE JONG-SOO |
发明人 |
LEE JONG-SOO |
分类号 |
H01L21/82;H01L27/00;H03K3/017;H03K5/04;H03K5/15;H03K5/156;(IPC1-7):H03K3/017 |
主分类号 |
H01L21/82 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|