| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a device for recovering a code clock from a received signal having wide frequency errors or offsets. <P>SOLUTION: Intensity values of received sampling in-phase and quadrature phase signals are determined (210). The intensity values are summed and distributed (227) in accumulator registers 231, 233, 235, 237 and 239, and the sum of first and second signals is totalized over respective sampling times and substantially predicted burst lengths. A maximum/minimum value determination circuit 240 selects a sampling time having a maximum or minimum sum and provides a recovered clock signal 270. Then a carrier is recovered (260), and a down sampler 250 down-samples the received in-phase and quadrature phase signals based on the recovered clock signal. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
