发明名称 CODING AND DECODING APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an MPEG coder for packetizing program clock reference information transmitted at transmission at a rate in response to a transmission path in advance, and to provide an MPEG decoder including a jitter suppressing apparatus when network jitter takes place in received data. <P>SOLUTION: A PCR generator 311 packetizes the program clock reference information at the rate in response to the transmission path in advance and the MPEG coder multiplexes a transport stream subjected to rate conversion at an FIFO 310 with a PCR packet being an output of the PCR generator 311 and outputs the multiplexed stream and packet. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005167449(A) 申请公布日期 2005.06.23
申请号 JP20030401110 申请日期 2003.12.01
申请人 CANON INC 发明人 KARASAWA KATSUMI
分类号 H04L12/70;H04L12/885;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/423;H04N19/70;(IPC1-7):H04N7/24;H04L12/56 主分类号 H04L12/70
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