| 摘要 |
A circuit element comprising N paired complementary transistors. The transistors are connected to an upper (VDD) and lower voltage level (VSS), in such a way that the paired transistors operate in subthreshold. N input terminals (X1, X2, .. XN) are connected to the respective paired transistors. Control terminals (BP, BN) are connected to control input nodes of the transistors. The circuit element provides the possibility of real time configuration between various logic funcitions with a minimum of transistors and wiring. |
