发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To solve a problem of occurring undesirable cell-area overhead increase such as due to cell-size increase when conventional data-retention flip-flops are used as a means for increasing return speed from a low power-consumption mode in which prior data at power shutoff are retained. <P>SOLUTION: The power supply lines for data retention during the power shutoff are formed with lines narrower than usual power main lines. Preferably, the power supply lines for the data-retention circuits are treated as signal lines in arranging by an automatic placement and routing tool. For this purpose, the terminals for the power supply to the data-retention circuits are designed in advance in the cells as similar to usual signal lines. Additional layout for the power supply lines is thereby unnecessary in the cells, resulting in area reduction as well as enabling to design by using an existing automatic placement and routing tool. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005167184(A) 申请公布日期 2005.06.23
申请号 JP20040185475 申请日期 2004.06.23
申请人 RENESAS TECHNOLOGY CORP 发明人 SUGANO YUSUKE;MIZUNO HIROYUKI;IRIE NAOHIKO
分类号 H01L21/822;G11C5/06;G11C11/417;H01L21/82;H01L27/02;H01L27/04;H01L27/092;H01L27/118;H03K3/037;H03K3/356;H03K3/3562;H03K19/00;H03K19/0175;H03K19/08;(IPC1-7):H01L21/822;H03K19/017 主分类号 H01L21/822
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