发明名称 Various structure/height bumps for wafer level-chip scale package
摘要 A die comprising: a substrate; two or more various shaped bump structures having a solder line formed over the substrate; and an epoxy layer formed over the substrate. The epoxy layer having a top surface wherein: (a) the solder lines are below the top surface of the epoxy layer'; (b) the solder lines are above the top surface of the epoxy layer; or (c) some of the solder lines are below the top surface of the epoxy layer and some of the solder lines are above the top surface of the epoxy layer.
申请公布号 US2005133933(A1) 申请公布日期 2005.06.23
申请号 US20030742306 申请日期 2003.12.19
申请人 ADVANPACK SOLUTIONS PTE. LTD. 发明人 SHEN CHNG H.;HAN MATTHEW L.E.
分类号 H01L21/56;H01L23/29;H01L23/31;H01L23/48;H01L23/485;H01L23/488;H01L23/60;H01L25/065;(IPC1-7):H01L23/48 主分类号 H01L21/56
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