| 摘要 |
PROBLEM TO BE SOLVED: To provide a timing control method of a memory device in which internal timing margin is made adjustable by the number of column cycles. SOLUTION: Disable timing of a word line is set in accordance with the number of the column cycles. Moreover, timing margin necessary to activate a new word line is secured by adjusting the equalizing time of a bit line. In order to set the disable starting time of the word line, the delay path of an internal command word is set so that the path is varied in accordance with the number of the column cycles. Furthermore, in order to adjust the starting time of equalizing, the delay path that generates a bit line equalizing signal is varied in accordance with the number of the column cycles. By counting activation time of the word line, the disable time of the word line is adjusted by the number of the column cycles. COPYRIGHT: (C)2005,JPO&NCIPI
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