发明名称 Circuit and associated methodology
摘要 A method of interstitial pre-discharge in a circuit includes providing the circuit, which includes a pre-charge node coupled to a clock evaluate node operable to receive a clock evaluate input cycle. Multiple pull-down stacks each including an interstitial node interconnect between the pre-charge node and ground. The interstitial node of each pull-down stack couples to an interstitial discharger device gated to ground. The method further includes operating the circuit in a pre-charge phase of the clock evaluate input cycle, including pre-charging the pre-charge node and the interstitial nodes, and keeping the devices in the pull-down stacks and the interstitial dischargers in a high impedance state. The method additionally includes operating the circuit in an evaluate phase of the clock cycle, including discharging the pre-charge node to ground through a pull-down stack, and discharging the interstitial node to ground through the interstitial discharger device to preclude charge share.
申请公布号 US2005127951(A1) 申请公布日期 2005.06.16
申请号 US20030735415 申请日期 2003.12.12
申请人 PATELLA BENJAMIN J.;STOUT JAMES C. 发明人 PATELLA BENJAMIN J.;STOUT JAMES C.
分类号 H03K19/096;(IPC1-7):H03K19/096 主分类号 H03K19/096
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