发明名称 Peripheral circuits of electrically programmable three-dimensional memory
摘要 The present invention makes improvements to the peripheral circuits of the electrically programmable three-dimensional memory (EP-3DM). Full-read mode and self-timing are used to improve the speed and lower the power consumption Cached EP-3DM is disclosed to reduce the latency. Redundancy can be employed to improve the yield of the EP-3DM.
申请公布号 US6906361(B2) 申请公布日期 2005.06.14
申请号 US20030615667 申请日期 2003.07.08
申请人 ZHANG GUOBIAO 发明人 ZHANG GUOBIAO
分类号 H01L27/06;(IPC1-7):H01L29/74;H01L29/76;H01L29/94;H01L31/062;H01L31/113 主分类号 H01L27/06
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