发明名称 Bus sequence operation with automatic linking from current I/O information to subsequent I/O information
摘要 In a computer system, a bus adapter processes bus operation information structures for performing bus operations by automatically starting processing each bus operation information structure after completing processing the previous bus operation information structure. A processor forms the bus operation information structures and sets control over each bus operation information structure to a sequencer for processing. When a next bus operation information structure is ready for processing after completing processing the previous bus operation information structure, the sequencer checks whether it has control over the next bus operation information structure, and if so, begins processing the next bus operation information structure without being instructed to do so by the processor.
申请公布号 US6904481(B1) 申请公布日期 2005.06.07
申请号 US20010834013 申请日期 2001.04.12
申请人 LSI LOGIC CORPORATION 发明人 BESMER BRAD D.;KENDALL GUY W.;DAY BRIAN A.
分类号 G06F13/00;G06F13/14;G06F13/38;(IPC1-7):G06F13/00 主分类号 G06F13/00
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