Determination of whether integrated circuit is acceptable or not in wafer-level burn-in test

摘要

A plurality of integrated circuits are inspected for their characteristics, after applying uniform stresses to the integrated circuits from common interconnections. A circuit is formed from common interconnections which are connectable in common to like electrode pads of the integrated circuits on the circuit substrate. Uniform stresses are applied from the common interconnections to the integrated circuits while the electrode pads of the integrated circuits are being connected to the common interconnections corresponding thereto. The electrode pads are disconnected from the common interconnections after the uniform stresses have been applied to the integrated circuits. The integrated circuits which have been disconnected from the common interconnections are individually inspected to determine whether the integrated circuits are acceptable or not, using the electrode pads.