发明名称 |
Integrated device with operativity testing |
摘要 |
An integrated device having a pad receiving, in a standard operative condition, an input signal having a first value and, in a test operative condition, a test voltage having a second value higher than the first value; an input stage connected to the pad and including an electronic component having a first terminal connected to the pad; a third-level detecting stage connected to the pad and supplying a logic third-level signal having a first level in presence of the input signal and a second level in presence of the test voltage; and a selector connected to a second terminal of the electronic component and structured to connect the second terminal to a reference potential in the presence of the first logic level of the third-level signal and to a biasing voltage higher than the reference potential and lower than the second value in the presence of the second logic level of the third-level signal.
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申请公布号 |
US6898745(B2) |
申请公布日期 |
2005.05.24 |
申请号 |
US20010798347 |
申请日期 |
2001.03.02 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
ZANARDI STEFANO;BRANCHETTI MAURIZIO;MULATTI JACOPO;PICCA MASSIMILIANO |
分类号 |
G01R31/317;G11C29/46;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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