| 摘要 |
<P>PROBLEM TO BE SOLVED: To connect a decoupling capacitor for suppressing the variations of power supply voltage and ground potential in a semiconductor integrated circuit device to the semiconductor integrated circuit device and a wiring board via a low resistance and a low inductance. <P>SOLUTION: A build-up layer 130a formed by alternately laminating wiring conductor layers 132 and insulating layers 131 is formed on at least one main surface of a core substrate 110. In a wiring board having a cavity 120 formed in the build-up layer 130a for receiving the chip-type decoupling capacitor 121, the capacitor 121 has an electrode terminal on the upper surface thereof to be connected directly to a semiconductor component 260. An electrode terminal on the lower surface of the capacitor 121 is connected to a wiring conductor layer 132a at the bottom surface of the cavity 120. Thus, the decoupling capacitor 121 can be connected to the semiconductor component 260 via a low resistance and a low inductance. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
