发明名称 MULTIPLE DATAPORT CLOCK SYNCHRONIZATION.
摘要 <p>A communications device (100, 102) apparatus and method is detailed that allows for improved operation and reduced costs of network communication links and datastreams (104) with an improved ability to merge and snychronize multiple WAN (110, 112, 114) and LAN (106, 108) dataport datastreams. The improved communications device apparatus and method allows for a master data clock selection, a clock recovery, a derivative data clock division and a dataport data clock selection that allows for the generation of one or more synchronous derivative data clocks and the merging of multiple dataport datastreams for data transceiving. The improved communications device apparatus and method alos allows for a master data clock to be recovered from a selected dataport and the other differing data rate dataports to be synchronized to it for the merging of multiple dataport datastreams for data transceiving.</p>
申请公布号 MXPA04004404(A) 申请公布日期 2005.05.16
申请号 MX2004PA04404 申请日期 2002.11.08
申请人 ADC DSL SYSTEMS, INC. 发明人 CRAIG EVENSEN
分类号 H04J3/06;H04L27/26;(IPC1-7):G06F1/12;H04B00/00 主分类号 H04J3/06
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