| 摘要 |
PROBLEM TO BE SOLVED: To provide a flip-flop with an increased operating speed and reduced power consumption. SOLUTION: The flip-flop comprises: a transmission gate which transmits a data signal to a first node for a fixed period of time after a clock signal has made a transition to an activated level; an inverter which is connected between the first node and a second node, receives the data signal and outputs an inverted data signal; a transistor which transmits the data signal of the first node and the inverted data of the second node to a third and a fourth nodes, respectively; and a latch for storing the data signals of the third and fourth nodes. When the clock signal CLK makes a transition from a low level to a high level, the data signal transmitted to the first node is transmitted to an output node through the transistor. Accordingly, an operating speed of the flip-flop increases. COPYRIGHT: (C)2005,JPO&NCIPI
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