| 摘要 |
PROBLEM TO BE SOLVED: To improve performance of a flash EEPROM mixed loading logic LSI by reducing the deterioration of sub-threshold characteristics of an MOS transistor in the logic circuit of mixed loading logic LSI accommodating the flash EEPROM and, further, reducing faulty connection leak caused by crystalline defects. SOLUTION: In the manufacturing method of a nonvolatile semiconductor memory device equipped with a memory element region 1 and a circumferential circuit region 2 at the outside of the memory element region 1, the circumferential circuit forming region is covered by films 22, 23 for preventing the invasion of oxygen, then, the tunnel oxide film 28 for the memory element forming region is formed. COPYRIGHT: (C)2005,JPO&NCIPI
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