发明名称 Random access memory with optional column address strobe latency of one
摘要 A random access memory comprises an array of memory cells, a memory configured to receive data from the array of memory cells, a bypass circuit configured to receive the data from the array of memory cells and to bypass the memory, and a circuit configured to select between receiving the data from the memory to provide first output signals and receiving the data from the bypass circuit to provide second output signals based on a column address strobe latency signal.
申请公布号 US2005102476(A1) 申请公布日期 2005.05.12
申请号 US20030706438 申请日期 2003.11.12
申请人 INFINEON TECHNOLOGIES NORTH AMERICA CORP. 发明人 PARTSCH TORSTEN
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
代理机构 代理人
主权项
地址