发明名称 Method for determining deskew margins in parallel interface receivers
摘要 Disclosed is a method for automatically testing the deskew setting for the clock in a parallel data interface. The deskew value is varied to a high and a low limit to the point where errors occur when transmissions occur. After determining the high and low operable limits of the deskew values, an optimum deskew setting may be determined and set for the system. The present invention may be used as a design verification technique, for optimizing a system after integration, or for further optimization of the deskew value after performing a training pattern for optimizing transmission performance.
申请公布号 US6892334(B2) 申请公布日期 2005.05.10
申请号 US20020214801 申请日期 2002.08.06
申请人 LSI LOGIC CORPORATION 发明人 SLUTZ MARK;SCHMITZ WILLIAM;SO DAVID
分类号 G11B20/20;H04B17/00;H04J3/06;(IPC1-7):G11B20/20 主分类号 G11B20/20
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