发明名称 |
Semiconductor memory device and its testing method |
摘要 |
A semiconductor memory device is of a bank switching type having a plurality of memory array banks provided in a memory chip which can be switched from one to another for storage operation. The semiconductor memory device includes: a plurality of memory arrays in the memory array banks; an input/output circuit for transmitting information data between the memory arrays and the outside; a data bus for connecting between the memory arrays and the input/output circuit; and N-channel transistors provided across the data bus. The data bus consists of a plurality of adjacent lines. Each of N-channel transistors is connected at their drain to the corresponding lines of the data bus while at their source to the ground. When a multi-bit test is commenced for writing and reading data on the memory arrays, the N-channel transistors are turned on to connect the lines of the data bus to the ground.
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申请公布号 |
US6888774(B2) |
申请公布日期 |
2005.05.03 |
申请号 |
US20020224499 |
申请日期 |
2002.08.21 |
申请人 |
MITSUBISHI ELECTRIC ENGINEERING COMPANY LIMITED |
发明人 |
SUZUKI TAKANOBU;TSURUDA TAMAKI;HAYASHI KATSUSHIGE |
分类号 |
G01R31/28;G11C11/401;G11C11/409;G11C29/00;G11C29/28;G11C29/34;(IPC1-7):G11C8/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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